同步程序
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4
.gitignore
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.gitignore
vendored
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||||
# <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>м<EFBFBD><D0BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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||||
PLC_Program/EJM560_JueMao_20250804_V0/Binaries/
|
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PLC_Program/EJM560_JueMao_20250804_V0/Physical/
|
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PLC_Program/EJM560_JueMao_20250804_V0/Temp/
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@@ -1,154 +0,0 @@
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<?xml version="1.0" encoding="utf-8"?>
|
||||
<?AutomationStudio Version=3.0?>
|
||||
<Transfer xmlns="http://br-automation.co.at/AS/Transfer">
|
||||
<OperatingSystem Version="G4.73"/>
|
||||
<Hardware Target="SG4"/>
|
||||
<Operation Delete="ProtectCur.br"/>
|
||||
<Operation Delete="Encoder.br"/>
|
||||
<Operation Delete="Audible.br"/>
|
||||
<Operation Delete="MatrixKeyb.br"/>
|
||||
<Operation Delete="RemoteCont.br"/>
|
||||
<Operation Delete="RtuMaster.br"/>
|
||||
<Operation Delete="SSET.br"/>
|
||||
<Operation Delete="IOs.br"/>
|
||||
<Operation Delete="ProjInit.br"/>
|
||||
<Operation Delete="CurSor.br"/>
|
||||
<Operation Delete="AsARCfg.br"/>
|
||||
<Operation Delete="MpAudit.br"/>
|
||||
<Operation Delete="MpFile.br"/>
|
||||
<Operation Delete="MpData.br"/>
|
||||
<Operation Delete="MTData.br"/>
|
||||
<Operation Delete="AsTCP.br"/>
|
||||
<Operation Delete="BrRand.br"/>
|
||||
<Operation Delete="vcpfgen.br"/>
|
||||
<Operation Delete="vccovl.br"/>
|
||||
<Operation Delete="vcdsint.br"/>
|
||||
<Operation Delete="vcrt.br"/>
|
||||
<Operation Delete="visvc.br"/>
|
||||
<Operation Delete="vcpdsw.br"/>
|
||||
<Operation Delete="vcalarm.br"/>
|
||||
<Operation Delete="vcbclass.br"/>
|
||||
<Operation Delete="vcpkat.br"/>
|
||||
<Operation Delete="vcmgr.br"/>
|
||||
<Operation Delete="vcfntttf.br"/>
|
||||
<Operation Delete="vcfile.br"/>
|
||||
<Operation Delete="vctcal.br"/>
|
||||
<Operation Delete="vccbtn.br"/>
|
||||
<Operation Delete="vcdsloc.br"/>
|
||||
<Operation Delete="Protect.br"/>
|
||||
<Operation Delete="DRV_mbus.br"/>
|
||||
<Operation Delete="Physical.br"/>
|
||||
<Operation Delete="AsIODiag.br"/>
|
||||
<Operation Delete="vcshared.br"/>
|
||||
<Operation Delete="msyh.br"/>
|
||||
<Operation Delete="simkai.br"/>
|
||||
<Operation Delete="arialbd.br"/>
|
||||
<Operation Delete="arial.br"/>
|
||||
<Operation Delete="CurSor03.br"/>
|
||||
<Operation Delete="CurSor02.br"/>
|
||||
<Operation Delete="CurSor01.br"/>
|
||||
<Operation Delete="CAN_Lib.br"/>
|
||||
<Operation Delete="MTFilter.br"/>
|
||||
<Operation Delete="ZMJ_Lib.br"/>
|
||||
<Operation Delete="aruser.br"/>
|
||||
<Operation Delete="dvframe.br"/>
|
||||
<Operation Delete="asusb.br"/>
|
||||
<Operation Delete="MpBase.br"/>
|
||||
<Operation Delete="brsystem.br"/>
|
||||
<Operation Delete="IecCheck.br"/>
|
||||
<Operation Delete="AsIecCon.br"/>
|
||||
<Operation Delete="astime.br"/>
|
||||
<Operation Delete="sys_lib.br"/>
|
||||
<Operation Delete="vcgclass.br"/>
|
||||
<Operation Delete="FileIO.br"/>
|
||||
<Operation Delete="DataObj.br"/>
|
||||
<Operation Delete="vcpdvnc.br"/>
|
||||
<Operation Delete="vcnet.br"/>
|
||||
<Operation Download="ashwd.br" Memory="SystemROM"/>
|
||||
<Operation Download="asfw.br" Memory="SystemROM"/>
|
||||
<Operation Download="arconfig.br" Memory="SystemROM"/>
|
||||
<Operation Download="sysconf.br" Memory="SystemROM"/>
|
||||
<Operation Restart="warm"/>
|
||||
<Operation Download="vcresman.br" Memory="UserROM"/>
|
||||
<Operation Download="vcnet.br" Memory="UserROM"/>
|
||||
<Operation Download="vcpdvnc.br" Memory="UserROM"/>
|
||||
<Operation Restart="warm"/>
|
||||
<Operation Download="udbdef.br" Memory="UserROM"/>
|
||||
<Operation Download="FWRules.br" Memory="UserROM"/>
|
||||
<Operation Download="TCData.br" Memory="SystemROM"/>
|
||||
<Operation Download="iomap.br" Memory="UserROM"/>
|
||||
<Operation Download="ashwac.br" Memory="UserROM"/>
|
||||
<Operation Download="Role.br" Memory="UserROM"/>
|
||||
<Operation Download="User.br" Memory="UserROM"/>
|
||||
<Operation Download="operator.br" Memory="UserROM"/>
|
||||
<Operation Download="runtime.br" Memory="UserROM"/>
|
||||
<Operation Download="standard.br" Memory="UserROM"/>
|
||||
<Operation Download="AsBrStr.br" Memory="UserROM"/>
|
||||
<Operation Download="MTTypes.br" Memory="UserROM"/>
|
||||
<Operation Download="visapi.br" Memory="UserROM"/>
|
||||
<Operation Download="asstring.br" Memory="UserROM"/>
|
||||
<Operation Download="Config_0.br" Memory="UserROM"/>
|
||||
<Operation Download="Config_1.br" Memory="UserROM"/>
|
||||
<Operation Download="Config_3.br" Memory="UserROM"/>
|
||||
<Operation Download="arsvcreg.br" Memory="UserROM"/>
|
||||
<Operation Download="DataObj.br" Memory="UserROM"/>
|
||||
<Operation Download="FileIO.br" Memory="UserROM"/>
|
||||
<Operation Download="vcgclass.br" Memory="UserROM"/>
|
||||
<Operation Download="sys_lib.br" Memory="UserROM"/>
|
||||
<Operation Download="astime.br" Memory="UserROM"/>
|
||||
<Operation Download="AsIecCon.br" Memory="UserROM"/>
|
||||
<Operation Download="IecCheck.br" Memory="UserROM"/>
|
||||
<Operation Download="brsystem.br" Memory="UserROM"/>
|
||||
<Operation Download="MpBase.br" Memory="UserROM"/>
|
||||
<Operation Download="asusb.br" Memory="UserROM"/>
|
||||
<Operation Download="dvframe.br" Memory="UserROM"/>
|
||||
<Operation Download="aruser.br" Memory="UserROM"/>
|
||||
<Operation Download="ZMJ_Lib.br" Memory="UserROM"/>
|
||||
<Operation Download="MTFilter.br" Memory="UserROM"/>
|
||||
<Operation Download="CAN_Lib.br" Memory="UserROM"/>
|
||||
<Operation Download="CurSor01.br" Memory="UserROM"/>
|
||||
<Operation Download="CurSor02.br" Memory="UserROM"/>
|
||||
<Operation Download="CurSor03.br" Memory="UserROM"/>
|
||||
<Operation Download="arial.br" Memory="UserROM"/>
|
||||
<Operation Download="arialbd.br" Memory="UserROM"/>
|
||||
<Operation Download="simkai.br" Memory="UserROM"/>
|
||||
<Operation Download="msyh.br" Memory="UserROM"/>
|
||||
<Operation Download="vcshared.br" Memory="UserROM"/>
|
||||
<Operation Download="AsIODiag.br" Memory="UserROM"/>
|
||||
<Operation Download="Physical.br" Memory="UserROM"/>
|
||||
<Operation Download="DRV_mbus.br" Memory="UserROM"/>
|
||||
<Operation Download="Protect.br" Memory="UserROM"/>
|
||||
<Operation Download="vcdsloc.br" Memory="UserROM"/>
|
||||
<Operation Download="vccbtn.br" Memory="UserROM"/>
|
||||
<Operation Download="vctcal.br" Memory="UserROM"/>
|
||||
<Operation Download="vcfile.br" Memory="UserROM"/>
|
||||
<Operation Download="vcfntttf.br" Memory="UserROM"/>
|
||||
<Operation Download="vcmgr.br" Memory="UserROM"/>
|
||||
<Operation Download="vcpkat.br" Memory="UserROM"/>
|
||||
<Operation Download="vcbclass.br" Memory="UserROM"/>
|
||||
<Operation Download="vcalarm.br" Memory="UserROM"/>
|
||||
<Operation Download="vcpdsw.br" Memory="UserROM"/>
|
||||
<Operation Download="visvc.br" Memory="UserROM"/>
|
||||
<Operation Download="vcrt.br" Memory="UserROM"/>
|
||||
<Operation Download="vcdsint.br" Memory="UserROM"/>
|
||||
<Operation Download="vccovl.br" Memory="UserROM"/>
|
||||
<Operation Download="vcpfgen.br" Memory="UserROM"/>
|
||||
<Operation Download="BrRand.br" Memory="UserROM"/>
|
||||
<Operation Download="AsTCP.br" Memory="UserROM"/>
|
||||
<Operation Download="MTData.br" Memory="UserROM"/>
|
||||
<Operation Download="MpData.br" Memory="UserROM"/>
|
||||
<Operation Download="MpFile.br" Memory="UserROM"/>
|
||||
<Operation Download="MpAudit.br" Memory="UserROM"/>
|
||||
<Operation Download="AsARCfg.br" Memory="UserROM"/>
|
||||
<Operation Download="datamod.br" Memory="UserROM"/>
|
||||
<Operation Download="CurSor.br" Memory="UserROM"/>
|
||||
<Operation Download="ProjInit.br" Memory="UserROM"/>
|
||||
<Operation Download="IOs.br" Memory="UserROM"/>
|
||||
<Operation Download="SSET.br" Memory="UserROM"/>
|
||||
<Operation Download="RtuMaster.br" Memory="UserROM"/>
|
||||
<Operation Download="RemoteCont.br" Memory="UserROM"/>
|
||||
<Operation Download="MatrixKeyb.br" Memory="UserROM"/>
|
||||
<Operation Download="Audible.br" Memory="UserROM"/>
|
||||
<Operation Download="Encoder.br" Memory="UserROM"/>
|
||||
<Operation Download="ProtectCur.br" Memory="UserROM"/>
|
||||
</Transfer>
|
||||
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@@ -0,0 +1,121 @@
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||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=AlarmText
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=10 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
EnAlarm BOOL[0..65535] 0 " *" 0 1 65536 0 1 1 a,0,255;
|
||||
EnAlarm[2560] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4096] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4097] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4098] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4099] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4100] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4101] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4102] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4103] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4104] BOOL 0 " *" 1 1 1 2 1 0
|
||||
EnAlarm[4105] BOOL 0 " *" 1 1 1 2 1 0
|
||||
AlarmList UINT[0..99] 0 " *" 0 6 100 0 1 0
|
||||
AlarmList[0] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[1] UINT 0 " *" 1 6 1 16 1 0
|
||||
AlarmList[2] UINT 0 " *" 1 6 1 16 1 0
|
||||
AlarmList[3] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[4] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[5] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[6] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[7] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[8] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[9] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[10] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[11] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[12] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[13] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[14] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[15] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[16] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[17] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[18] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[19] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[20] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[21] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[22] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[23] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[24] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[25] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[26] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[27] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[28] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[29] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[30] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[31] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[32] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[33] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[34] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[35] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[36] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[37] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[38] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[39] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[40] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[41] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[42] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[43] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[44] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[45] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[46] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[47] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[48] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[49] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[50] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[51] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[52] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[53] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[54] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[55] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[56] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[57] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[58] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[59] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[60] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[61] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[62] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[63] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[64] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[65] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[66] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[67] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[68] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[69] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[70] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[71] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[72] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[73] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[74] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[75] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[76] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[77] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[78] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[79] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[80] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[81] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[82] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[83] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[84] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[85] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[86] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[87] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[88] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[89] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[90] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[91] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[92] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[93] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[94] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[95] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[96] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[97] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[98] UINT 0 " *" 1 6 1 10 1 0
|
||||
AlarmList[99] UINT 0 " *" 1 6 1 10 1 0
|
||||
Test USINT 0 " *" 0 5 1 10 1 0
|
||||
AlarmCode tAlarmCode 0 " *" 0 24 1 0 0 1
|
||||
New UINT 0 " *" 1 6 1 10 0 0
|
||||
Loop UINT 0 " *" 1 6 1 10 0 0
|
||||
Index UDINT 0 " *" 1 7 1 10 0 0
|
||||
@@ -0,0 +1,155 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=ControlMBT
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=103 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
holdingReg UINT[0..99] 1 " *" 0 6 100 0 0 0 a,1,100
|
||||
holdingReg[0] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[1] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[2] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[3] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[4] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[5] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[6] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[7] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[8] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[9] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[10] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[11] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[12] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[13] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[14] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[15] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[16] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[17] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[18] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[19] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[20] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[21] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[22] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[23] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[24] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[25] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[26] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[27] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[28] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[29] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[30] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[31] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[32] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[33] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[34] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[35] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[36] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[37] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[38] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[39] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[40] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[41] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[42] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[43] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[44] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[45] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[46] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[47] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[48] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[49] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[50] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[51] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[52] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[53] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[54] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[55] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[56] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[57] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[58] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[59] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[60] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[61] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[62] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[63] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[64] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[65] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[66] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[67] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[68] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[69] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[70] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[71] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[72] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[73] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[74] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[75] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[76] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[77] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[78] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[79] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[80] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[81] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[82] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[83] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[84] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[85] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[86] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[87] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[88] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[89] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[90] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[91] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[92] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[93] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[94] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[95] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[96] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[97] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[98] UINT 0 " *" 1 6 1 10 1 0
|
||||
holdingReg[99] UINT 0 " *" 1 6 1 10 1 0
|
||||
CentralizedKey EJM_RemoteControl 0 " *" 0 24 1 0 0 1
|
||||
WorkMode SINT 0 " 3" 1 2 1 10 0 0
|
||||
EStop BOOL 0 " TRUE" 1 1 1 2 0 0
|
||||
PumpStart BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
PumpStop BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
CutStart BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
CutStop BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
LoaderStart BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
LoaderStop BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
TransportCorotation BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
TransportReversal BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
TransportStop BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
StandbyStart BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
StandbyStop BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
Reset BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
Track SINT 0 " 12" 1 2 1 10 0 0
|
||||
TrackL SINT 0 " 0" 1 2 1 10 0 0
|
||||
TrackR SINT 0 " 0" 1 2 1 10 0 0
|
||||
Cut SINT 0 " 0" 1 2 1 10 0 0
|
||||
Cutt SINT 0 " 0" 1 2 1 10 0 0
|
||||
TransportLifterStr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
TransportLifterShr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
TransportSwingStr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
TransportSwingShr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
BoardLifterStr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
BoardLifterShr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
BoardExpansionStr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
BoardExpansionShr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
SupportLStr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
SupportLShr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
SupportRStr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
SupportRShr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
HydraulicStr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
HydraulicShr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
ECUStr BOOL 0 " FALSE" 1 1 1 2 0 0
|
||||
ECUShr BOOL 0 " *" 1 1 1 2 0 0
|
||||
SupportTmpStr BOOL 0 " *" 1 1 1 2 0 0
|
||||
SupportTmpShr BOOL 0 " *" 1 1 1 2 0 0
|
||||
RollerStr BOOL 0 " *" 1 1 1 2 0 0
|
||||
RollerShr BOOL 0 " *" 1 1 1 2 0 0
|
||||
LubPump BOOL 0 " *" 1 1 1 2 0 0
|
||||
BoostPump BOOL 0 " *" 1 1 1 2 0 0
|
||||
TrackTension BOOL 0 " *" 1 1 1 2 0 0
|
||||
TransportTension BOOL 0 " *" 1 1 1 2 0 0
|
||||
DustFan BOOL 0 " *" 1 1 1 2 0 0
|
||||
LS2 BOOL 0 " *" 1 1 1 2 0 0
|
||||
LS3_TravelHigh BOOL 0 " *" 1 1 1 2 0 0
|
||||
LockWater BOOL 0 " *" 1 1 1 2 0 0
|
||||
LockCylinder BOOL 0 " *" 1 1 1 2 0 0
|
||||
MotorUnlock BOOL 0 " *" 1 1 1 2 0 0
|
||||
MotorLock BOOL 0 " *" 1 1 1 2 0 0
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=ControlOpc
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
@@ -0,0 +1,15 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=ControlOpc
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=7 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
Test_uint32 UDINT[0..1] 0 " *" 0 7 2 0 1 1 a,1,2
|
||||
Test_uint32[0] UDINT 0 " 519443585" 1 7 1 10 1 0
|
||||
Test_uint32[1] UDINT 0 " 0" 1 7 1 10 1 0
|
||||
Test_int8 SINT[0..7] 0 " *" 0 2 8 0 1 1 a,1,8
|
||||
Test_int8[0] SINT 0 " -127" 1 2 1 10 1 0
|
||||
Test_int8[1] SINT 0 " 20" 1 2 1 10 1 0
|
||||
Test_int8[2] SINT 0 " -10" 1 2 1 10 1 0
|
||||
Test_int8[3] SINT 0 " 30" 1 2 1 10 1 0
|
||||
Test_int8[4] SINT 0 " -127" 1 2 1 10 1 0
|
||||
Test_int8[5] SINT 0 " 20" 1 2 1 10 1 0
|
||||
Test_int8[6] SINT 0 " -10" 1 2 1 10 1 0
|
||||
Test_int8[7] SINT 0 " 30" 1 2 1 10 1 0
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=ControlOpc
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=ControlRem
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=DataRecord
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=DataRecord
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=Encoder
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=General
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=General
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=General
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
@@ -0,0 +1,3 @@
|
||||
WATCH Ver=2.00 PLCName=PLC1 CPUName=CPU TaskName=General
|
||||
Position X=0 Y=0 Width=0 Height=0 TabWidth Name=150 Type=0 Scope=0 Force=0 Index=0 ASCIIString=0
|
||||
name type force value level type len format place expand specs
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user